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PRODID:-//IEEE Colombia - ECPv6.15.16//NONSGML v1.0//EN
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X-ORIGINAL-URL:https://ieee.org.co
X-WR-CALDESC:Eventos para IEEE Colombia
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DTSTART:20240101T000000
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BEGIN:VEVENT
DTSTART;TZID=UTC:20250901T140000
DTEND;TZID=UTC:20250902T230000
DTSTAMP:20260615T040938
CREATED:20250807T190007Z
LAST-MODIFIED:20250901T195835Z
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SUMMARY:Workshop on integrated circuit design for beginners
DESCRIPTION:In countries such as Colombia\, an IC design industry has not been developed\, partly due to the poor accessibility of EDA tools for IC design\, due to customs restrictions or high costs. The recent availability of open-source IC design tools\, open-source PDKs for mature IC technologies at 180nm and 130nm\, and initiatives to universalise IC design (such as the UNIC-CASS programme) allow countries like Colombia to dream of developing an IC design industry. This workshop aims to provide the basis on design of integrated circuits using open-source tools in a two-day hands-on experience. This event is sponsored by the IEEE Colombian Chapter on Circuits and Systems Society (CASS) and Pontificia Universidad Javeriana Cali.  Free registration but seats are limited!!  Co-sponsored by: Pontificia Universidad Javeriana – Cali  Agenda:  Day 1: 9:00am – 6:00pm:  – Fundamentals on design of integrated circuits. – Design flow for analog and digital IC. – Hands-on tutorials for IC design using open-source tools.  Day 2: 9:00am – 6:00pm  – Hands-on tutorials for IC design using open-source tools.  Bldg: Edificio Palmas\, Calle 18 No. 118-250\, Pontificia Universidad Javeriana Cali\, Cali\, Valle del Cauca\, Colombia
URL:https://ieee.org.co/event/workshop-on-integrated-circuit-design-for-beginners/
LOCATION:Bldg: Edificio Palmas\, Calle 18 No. 118-250\, Pontificia Universidad Javeriana Cali\, Cali\, Valle del Cauca\, Colombia
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BEGIN:VEVENT
DTSTART;TZID=UTC:20250901T210000
DTEND;TZID=UTC:20250904T230000
DTSTAMP:20260615T040938
CREATED:20250901T195835Z
LAST-MODIFIED:20250901T195835Z
UID:1582-1756760400-1757026800@ieee.org.co
SUMMARY:Workshop on Advanced FinFET Layout – Part 1
DESCRIPTION:This workshop introduces participants to advanced concepts and practical methodologies in FinFET layout design. The session will cover the key challenges of nanoscale device integration\, design rules\, and layout techniques specific to FinFET technologies. Through a combination of theoretical discussion and hands-on exercises\, students will gain practical skills to address parasitics\, matching strategies\, and reliability considerations in advanced nodes.  Speaker(s): Alex Mantilla \, Jeison Acevedo\,   Room: 150\, Bldg: Laboratorios Pesados\, carrera 27 calle 9\, Bucamanga\, Santander\, Colombia\, 680002
URL:https://ieee.org.co/event/workshop-on-advanced-finfet-layout-part-1/
LOCATION:Room: 150\, Bldg: Laboratorios Pesados\, carrera 27 calle 9\, Bucamanga\, Santander\, Colombia\, 680002
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