BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//IEEE Colombia - ECPv6.15.16//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-ORIGINAL-URL:https://ieee.org.co
X-WR-CALDESC:Eventos para IEEE Colombia
REFRESH-INTERVAL;VALUE=DURATION:PT1H
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X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:UTC
BEGIN:STANDARD
TZOFFSETFROM:+0000
TZOFFSETTO:+0000
TZNAME:UTC
DTSTART:20240101T000000
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BEGIN:VEVENT
DTSTART;TZID=UTC:20250901T210000
DTEND;TZID=UTC:20250904T230000
DTSTAMP:20260615T050518
CREATED:20250901T195835Z
LAST-MODIFIED:20250901T195835Z
UID:1582-1756760400-1757026800@ieee.org.co
SUMMARY:Workshop on Advanced FinFET Layout – Part 1
DESCRIPTION:This workshop introduces participants to advanced concepts and practical methodologies in FinFET layout design. The session will cover the key challenges of nanoscale device integration\, design rules\, and layout techniques specific to FinFET technologies. Through a combination of theoretical discussion and hands-on exercises\, students will gain practical skills to address parasitics\, matching strategies\, and reliability considerations in advanced nodes.  Speaker(s): Alex Mantilla \, Jeison Acevedo\,   Room: 150\, Bldg: Laboratorios Pesados\, carrera 27 calle 9\, Bucamanga\, Santander\, Colombia\, 680002
URL:https://ieee.org.co/event/workshop-on-advanced-finfet-layout-part-1/
LOCATION:Room: 150\, Bldg: Laboratorios Pesados\, carrera 27 calle 9\, Bucamanga\, Santander\, Colombia\, 680002
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